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high speed, 10 ghz window comparator data sheet HMC974LC3C rev. e document feedback information furnished by analog devices is believed to be accurate and reliable. however, no responsibility is assumed by analog devices for its use, nor for any infringements of patents or other rights of third parties that may result from its use. specifications subject to change without notice. no license is granted by implication or otherwise under any patent or patent rights of analog devices. trademarks and registered trademarks are the property of their respective owners. one technology way, p.o. box 9106, norwood, ma 02062-9106, u.s.a. tel: 781.329.4700 ?2018 analog devices, inc. all rights reserved. technical support www.analog.com features propagation delay: 88 ps propagation delay at 50 mv overdrive: 20 ps minimum detectable pulse width: 60 ps differential latch control power dissipation: 240 mw 16-terminal 2.9 mm 2.9 mm lcc package applications automatic test equipment (ate) high speed instrumentation clock and data restoration semiconductor test systems threshold detection in electronic warfare systems functional block diagram 1 rt 2 w in 3 wit 4 rb orb 12 woutb 11 urb 10 v cco 9 5 v cci 6 7 le 8 v ee 16 v cci 15 rtn 14 v ee 13 v cco le v ee package base 14863-001 HMC974LC3C figure 1. general description the HMC974LC3C is a silicon germanium (sige) monolithic, ultra fast window comparator that features reduced swing positive emitter-coupled logic (rspecl) output drivers that are level latched. three output ports detect whether an analog input signal is above, below, or between two reference levels supplied at the input (see figure 2). the outputs are single-ended negative logic. incorporating two proven comparators at the input provides good dc and dynamic matching and reduces the input capacitance. the reduced swing output stages are designed to directly drive 400 mv into 50 terminated to a voltage (v term = v cco ? 2 v). the HMC974LC3C features high speed latches that can either be enabled to latch the output data or left in the track mode to implement a tracking window comparator.
HMC974LC3C data sheet rev. e | page 2 of 12 table of contents features .............................................................................................. 1 ? applications ....................................................................................... 1 ? functional block diagram .............................................................. 1 ? general description ......................................................................... 1 ? revision history ............................................................................... 2 ? specifications ..................................................................................... 3 ? timing diagram ........................................................................... 4 ? absolute maximum ratings ............................................................ 5 ? esd caution .................................................................................. 5 ? pin configuration and function descriptions ..............................6 ? interface schematics .....................................................................7 ? typical performance characteristics ..............................................8 ? theory of operation .........................................................................9 ? power sequencing .........................................................................9 ? applications information .............................................................. 10 ? evaluation board ........................................................................ 10 ? outline dimensions ....................................................................... 12 ? ordering guide .......................................................................... 12 ? revision history 4/2018rev. d to rev. e changes to woutb parameter, unit column, table 1 and urb and orb parameter, unit column, table 1 .................................. 3 changes to ordering guide .......................................................... 12 6/2017rev. c to rev. d changes to table 1 ............................................................................ 3 added maximum peak reflow temperature parameter, table 2 ................................................................................................ 5 updated outline dimensions ....................................................... 12 changes to ordering guide .......................................................... 12 this hittite microwave products data sheet has been reformatted to meet the styles and standards of analog devices, inc. 3/2017v04.0616 to rev. c updated format .................................................................. universal changes to general description ..................................................... 1 changes to table 1 ............................................................................. 3 added negative supply (v ee to gnd) parameter, table 2 .......... 5 changes to table 3 ............................................................................. 5 added theory of operation section, power sequencing section, and table 4 .......................................................................................... 9 added applications information section changes to evaluation board section and table 5 .................... 10 updated outline dimensions ....................................................... 12 changes to ordering guide .......................................................... 12
data sheet HMC974LC3C rev. e | page 3 of 12 specifications t a = 25c, v ee = ?3 v, v cci = 3.3 v, v cco = 2 v, v term = 0 v, v cm = 0 v, v od = 50 mv. v od is the input overdrive voltage, for example, v win ? v rt = v od or v win ? v rb = v od . table 1. parameter min typ max unit test conditions/comments dc input characteristics offset voltage ?10 4 +10 mv bias current ?30 +20 +30 a wit pin termination open differential voltage ?2 +2 v measured between the win pin voltage and the rt pin voltage or rb pin voltage input impedance win pin to wit pin 50 rt pin to wit pin 50 rb pin to wit pin 50 common-mode input voltage range ?1.5 +1.5 v wit to gnd input capacitance 1 pf latch enable characteristics le and le input low voltage (v il ) 1.6 v input high voltage (v ih ) 2.2 v le and le impedance 7.8 k if not driven, the device is unlatched dc output characteristics output voltage high level, v oh (50 to 0 v) 1.06 v low level, v ol (50 to 0 v) 0.73 v output voltage swing woutb 300 360 420 mv urb and orb 320 380 440 mv ac performance propagation delay dispersion vs. v od 20 ps for v od > 50 mv rise time (orb, woutb, urb), t r 25.3 ps 20% to 80% fall time (orb, woutb, urb), t f 21.9 ps 80% to 20% minimum detectable pulse width 60 ps v cm = 0 v; 100 mv overdrive voltage equivalent input bandwidth 1 11 ghz input to output delay, t pd 88 ps latch to output delay, t pd 83 ps maximum input slew rate 5 v/ns noise (referred to input) 6 nv/(hz) random jitter (rms) 0.2 ps rms at 5 gbps with 100 mv overdrive deterministic jitter (peak to peak) 2 ps at 5 gbps with 100 mv overdrive power supplies (including load) positive supply voltage input stage (v cci ) 3.135 3.3 3.465 v positive supply voltage output stage (v cco ) 1.8 3.3 3.465 v negative power supply (v ee ) ?3.15 ?3.0 ?2.85 v positive supply current input stage (i cci ) 10 15 20 ma positive supply current output stage (i cco ) 60 70 80 ma negative current (i ee ) 21 31 41 ma power dissipation (p d ) 240 mw 1 equivalent input bandwidth is calculated with the following formula: b weq = 0.22?(tr comp 2 ? tr in 2 ), where b weq is the equivalent bandwidth formula, tr in is the 20% to 80% transition time of a quasi gaussian sign al applied to the comparator input, and tr comp is the effective transition t ime digitized by the comparator.
HMC974LC3C data sheet rev. e | page 4 of 12 timing diagram rt rb win orb w outb urb le, le latch latch track t pd (le to out)_orb t pd (in to out)_orb t f t r t pd (in to out)_woutb_h to l t pd (in to out)_woutb_l to h t pd (in to out)_urb_l to h t pd (in to out)_urb_h to l 14863-002 figure 2. timing diagram
data sheet HMC974LC3C rev. e | page 5 of 12 absolute maximum rat ings table 2 . parameter rating input supply voltage (v cci to gnd) ? 0.5 v to +4 v output supply voltage (v cco to gnd) ? 0.5 v to +4 v positive supply differential (v cci ? v cco ) ? 0.5 v to +3 v negative supply (v ee to gnd) ?3.3 v to +0.5 v input voltage ? 2 v to +2 v differential input voltage ? 2 v to +2 v output current 40 ma junction temperature 125 c continuous power dis s ipation (t = 85c; d erate 20.4 mw/c a bove 85c) 0.816 w thermal resistance ( jc ) 49 c/w maximum peak reflow temperature 1 moisture sensitivity level 1 (msl1) and moisture sensitivity level 3 (msl3) 260 c storage temperature range ?65c to +150 c operating temperature range ?40 c to +85 c electrostatic discharge ( esd ) sensitivity h uman b ody m odel class 1b 1 see the ordering guide section. stresses at or above those listed under absolute maximum ratings may cause permanent damage to the product. this is a stress rating only; functional operation of the product at these or any other conditions above those indicated in the operational section of this specification is not implied. operation beyond the maximum operating conditions for extended periods may affect product reliability. esd caution
HMC974LC3C data sheet rev. e | page 6 of 12 pin configuration and fu nction descriptions 1 rt 2 win 3 wit 4 rb 12 orb 11 woutb 10 urb 9v cco 5 v cci 6 7 le 8 v ee 16 v cci 15 rtn 14 v ee 13 v cco le HMC974LC3C top view (not to scale) v ee package base 14863-003 notes 1. exposed pad. the exposed pad must be connected to v ee . figure 3. pin configuration table 3. pin function descriptions pin no. mnemonic description 1 rt termination resistor for reference top. 2 win analog input window. 3 wit common mode window for termination resistors. 4 rb termination resistor return for reference bottom. 5, 16 v cci positive supply voltage input stage. 6 le inverting latch enable input. 7 le noninverting latch enable input. 8, 14 v ee negative power supply 9, 13 v cco positive supply voltage output stage. 10 urb underange output. urb is asserted low when the analog input voltage is below the rb pin voltage. 11 woutb window output. woutb is asserted low when the analog input voltage is between the rb pin voltage and the rt pin voltage. 12 orb overrange output. orb is asserted low when the an alog input voltage range is above the rt pin voltage. 15 rtn esd protection return. epad exposed pad. the expose d pad must be connected to v ee .
data sheet HMC974LC3C rev. e | page 7 of 12 interface schematics rt 50 win wit rb 50 50 figure 4 . interface schematic for rt, rb, win, and wit v ee v cci le, le 14863-005 figure 5 . interface schematic for le and le urb, woutb, orb v cco 14863-006 figure 6 . interface schematic for urb, woutb, and orb
HMC974LC3C data sheet rev. e | page 8 of 12 typical performance characteristics 0 10 30 20 40 50 60 70 80 90 100 110 dispersion (ps) overdrive voltage (mv) ?15 0 15 30 45 60 75 v cm = +0.5v v cm = 0v v cm = ?0.5v 14863-007 figure 7 . dispersion vs. o verdrive voltage ?45 ?32 ?6 ?19 7 20 33 46 59 72 85 output voltage swing (v) temperature (c) orb swing wout swing urb swing 0.30 0.38 0.46 0.54 0.62 14863-008 figu re 8 . output voltage s wing vs. temp erature ?45 ?32 ?6 ?19 7 20 33 46 59 72 85 delay (ps) temperature (c) 20 22 24 26 28 30 32 34 36 orb, rise wout, rise urb, rise orb, fall wout, fall urb, fall 14863-009 figure 9 . output rise and fall time ?45 ?32 ?6 ?19 7 20 33 46 59 72 85 v ol /v oh levels (v) temperature (c) orb, v oh wout, v oh urb, v oh orb, v ol wout, v ol urb, v ol 0.5 0.7 0.9 1.1 1.3 1.5 14863-010 figure 10 . v ol /v oh levels vs. temperature ?45 ?32 ?6 ?19 7 20 33 46 59 72 85 current (ma) temperature (c) 10 20 30 40 50 60 70 80 v cci v cco v ee 14863-011 fig ure 11 . power supply currents
data sheet HMC974LC3C rev. e | page 9 of 12 theory of operation the HMC974LC3C is a window comparator where the range of the window is defined with rt as the top of the voltage window range and rb as the bottom of the voltage window range. the comparator has two modes of operation: track mode and latch mode. while in track mode, the comparator determines three things: 1. if the signal is below the window voltage value, rt, and above the window voltage value, rb, represented by the woutb output. 2. if the signal is above the window voltage value rt, which is represented by the orb output. 3. if the signal is below the window voltage value rb, which is represented by the urb output. a typical 5 gbps output eye is shown in figure 12 with specific details outlined in table 4. time (33.3ps/div) voltage (80mv/div) 14863-012 edge samples figure 12. eye diagram at 5 gbps table 4. eye diagram details parameter value bit rate 5 gbps pattern length 2 15 ? 1 deterministic jitter (peak-to-peak) 2.15 ps vertical scale 80 mv/div time scale 33.3 ps/div power sequencing use the following supplies sequentially to power up the device: 1. v ee 2. v cci and v cco (if v cco = v cci ) 3. v cco (if different than ground) the power-down sequence is the reverse of the previous sequence: 1. v cco (if different than ground) 2. v cci and v cco (if v cco = v cci ) 3. v ee apply power to the HMC974LC3C before applying the input signals (win and wit) and remove the input signals (win and wit) prior to powering it down.
HMC974LC3C data sheet rev. e | page 10 of 12 applications information evaluation board the HMC974LC3C evaluation printed circuit board (pcb) must use rf circuit design techniques. signal lines must have 50 impedance while the package ground leads must connect directly to the ground plane of the pcb. the exposed metal package base must connect to v ee . ensure the top and bottom ground planes connect together with via holes. the evaluation pcb shown in figure 13 is available from analog devices, inc., upon request. figure 14 shows the eval-HMC974LC3C schematic. figure 15 shows the typical application circuit. table 5. bill of materials reference designator description j1 eight-position vertical header j2 to j7 k connector, sri j8 terminal strip, single row, 3-pin jp1, jp2 two position vertical header c1 to c3, c5, c6, c8 to c10, c15 100 pf capacitor, 0402 c4, c7, c11 330 pf capacitor, 0402 c12 to c14 4.7 f tantalum capacitor tp1 to tp4 dc pin u1 HMC974LC3C window comparator pcb eval-HMC974LC3C evaluation board, circuit board material is either rogers 4350 or arlon 25fr 14863-013 figure 13. evaluation printed circuit board
data sheet HMC974LC3C rev. e | page 11 of 12 1 2 3 4 12 11 10 9 5 6 7 8 16 15 14 13 c6 100pf tp4 c5 100pf c7 330pf c13 4.7f j1 v cci c8 100pf jp1 tp1 rt j2-win tp2-wit c1 100pf jp2 c9 100pf jp3 tp3 rb j1 v cci j1 v cci 1 2 3 4 5 6 7 8 c10 100pf j6 le j7 le j1 v ee c14 4.7f c11 330pf c12 4.7f c4 330pf c2 100pf c3 100pf c15 100pf j1 v cco j1 v ee j3 orb j4 woutb j5 urb j1 v cco j8 gnd v ee gnd v ee v cc0 v ee jp8 slug v ee package base 14863-014 figure 14 . evaluation board schematic 50 ? 50 ? gnd orb, woutb, urb hmc974 10ghz window comparator v cm_out ~0.9v v ee = ?3.0v oscilloscope input v cco = +2.0v v cci = +3.3v 14863-015 figure 15 . typical application circuit
HMC974LC3C data sheet rev. e | page 12 of 12 outline dimensions top view side view 02-24-2017-c pkg-004838 pin 1 indicator 3.05 2.90 sq 2.75 exposed pad 0.36 0.30 0.24 1.60 1.50 sq 1.40 1 0.50 bsc bottom view 16 5 8 9 12 13 4 0.08 bsc for proper connection of the exposed pad, refer to the pin configuration and function descriptions section of this data sheet. 1.50 ref 2.10 bsc seating plane 0.32 bsc p i n 1 0.90 0.80 0.70 figure 16. 16-terminal cerami c leadless chip carrier [lcc] (e-16-1) dimensions shown in millimeters ordering guide model 1 temperature range msl rating 2 package description 3 package option HMC974LC3C ?40c to +85c msl3 16-terminal ceramic leadless chip carrier [lcc] e-16-1 HMC974LC3Ctr ?40c to +85c msl3 16-terminal ceramic leadless chip carrier [lcc] e-16-1 HMC974LC3Ctr-r5 ?40c to +85c msl3 16-terminal ceramic leadless chip carrier [lcc] e-16-1 129538-HMC974LC3C evaluation board 1 the HMC974LC3C, the hmc974lc3 ctr, and the HMC974LC3Ctr-r5 are rohs compliant parts. 2 see the absolute maximum ratings section. 3 alumina and white package body material with a gold over nickel lead finish. ?2018 analog devices, inc. all rights reserved. trademarks and registered trademarks are the prop erty of their respective owners. d14863-0-4/18(e)

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